RTL Design Implementation & SOC Design

8 - 13 Years
Bengaluru, Hyderabad

Job Description

Staff = Manager
Position Title - Senior Staff Engineer - Design Implementation
Work Location - Chennai

Please send updated resume along with salary details to shiva@cambio.co.in

Notice Period:

The candidate will be responsible for synthesis/formal verification and design support for next-generation SoCs subsystems for WIFI/Connectivity chips.
This role will require the candidate to understand and drive Synthesis, Formal verification, and partner with DFT and PD teams for timing convergence.
Synthesis of a subsystem/SOC with multiple Hard Macros
FV with LEC in multiple stages of RTL to NL flow.
Implement the ECO in NL using conformal flow
Work in close coordination with Design, PD, DFT teams to get the goals completed.
Analyze reports/waivers and run various tools: DC, DCT, DCG, Genus, Primetime, etc
Preferred Qualifications:
Synthesis, LEC, low power checks, Memory BIST insertion, SDC validation.
10-15 years of solid experience in synthesis, formal verification with a design background
Expertise in Synopsys DCT/DCG Synthesis/Cadence Genus
Expertise in formal verification with Cadence LEC Understanding of RTL to GDS flow
Expertise in timing closure, PT runs Expertise in Verilog/VHDL Expertise in Perl, TCL language is a plus Expertise in post-Si debug is a plus Good documentation and communication skills

Salary: Not Disclosed by Recruiter

Industry:Semiconductors / Electronics

Functional Area:IT Software - Embedded, EDA, VLSI, ASIC, Chip Design

Role Category:Programming & Design

Role:Team Lead/Technical Lead


Desired Candidate Profile

Please refer to the Job description above

Company Profile

Cambio Consulting India Pvt Ltd

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Recruiter Name:Sheshagiri Rao

Contact Company:Cambio Consulting India Pvt Ltd