Equivalence checking, ECO execution, Place and Route, DRC/LVS, IR/EM activities are essential part of the job.
Exposure to 16nm/14nm and below is beneficial.
Full chip Physical Design knowledge is highly desirable.
Cadence or Synopsys Tool knowledge expected.
Good ASIC design and problem-solving skills are a must.
Salary: Not Disclosed by Recruiter
Industry:Semiconductors / Electronics
Functional Area:IT Software - Embedded, EDA, VLSI, ASIC, Chip Design
Role Category:Programming & Design
Role:Team Lead/Technical Lead
Desired Candidate Profile
Cambio Consulting India Pvt Ltd
Contact Company:Cambio Consulting India Pvt Ltd