The Design-For-Test (DFT) engineer To deliver design-for-test and test automation solutions to customers designing digital ICs of varying complexities.
DFT -- Responsibilities as following:
- DFT, MBIST, Scan, ATPG.
- Experience in Timing / Verification
- Consultation for test solutions during design planning/budgeting
- Test methodology design rules checking during RTL coding stages
- Implementation of design for test (DFT) compression, automatic test generation for single stuck at (SSAF), Transition Delay Fault, Cell-aware faults, and other advanced fault models
- Provider of methodologies for test automation flow integration with design planning, RTL analysis, logic synthesis, physical design and sign-off verification tools (static timing, simulation, formal verification)
- Experience with test compressions tools, flows, and methodologies are an asset.
- Design and verification experience is a plus.
- Within the platform they contribute to DFT technology and development
Salary: Not Disclosed by Recruiter
Industry:Semiconductors / Electronics
Functional Area:Engineering Design, R&D
Role Category:Engineering Design
Role:Senior Design Engineer
Desired Candidate Profile
UG:B.Sc - Any Specialization, B.Tech/B.E. - Any Specialization
PG:MS/M.Sc(Science) - Any Specialization, M.Tech - Any Specialization
Cambio Consulting India Pvt Ltd
Contact Company:Cambio Consulting India Pvt Ltd